
SC16C850
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NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 11 November 2010
33 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
[1]
When using a software flow control the Xon/Xoff characters cannot be used for data transfer.
7.15 Transmit Interrupt Level Register (TXINTLVL)
This 8-bit register is used to store the transmit FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 25 shows the TXINTLVL register bit settings.
[1]
7.16 Receive Interrupt Level Register (RXINTLVL)
This 8-bit register is used store the receive FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 26 shows the RXINTLVL register bit settings.
Table 24.
Software flow control functions[1] Cont-3
Cont-2
Cont-1
Cont-0
TX, RX software flow controls
0
X
No transmit flow control
1
0
X
Transmit Xon1/Xoff1
0
1
X
Transmit Xon2/Xoff2
1
X
Transmit Xon1 and Xon2/Xoff1 and Xoff2
X
0
No receive flow control
X
1
0
Receiver compares Xon1/Xoff1
X
0
1
Receiver compares Xon2/Xoff2
1
0
1
Transmit Xon1/Xoff1
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
0
1
Transmit Xon2/Xoff2
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
1
Transmit Xon1 and Xon2, Xoff1 and Xoff2
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
Table 25.
TXINTLVL register bits description
Bit
Symbol
Description
7:0
TXINTLVL[7:0]
This register stores the programmable transmit interrupt trigger levels
for 128-byte FIFO mode
[1].
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Table 26.
RXINTLVL register bits description
Bit
Symbol
Description
7:0
RXINTLVL[7:0]
This register stores the programmable receive interrupt trigger levels
for 128-byte FIFO mode
[1].
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128